What is JK Flip-Flop?
It is one kind of sequential logic circuit which stores binary information in bitwise manner. It consists of two inputs and two outputs. Inputs are Set(J) & Reset(K) and their corresponding outputs are Q and Q’. JK flipflop has two modes of operation which are synchronous mode and asynchronous mode. In synchronous mode, the state will be changed with the clock(clk) signal, and in asynchronous mode, the change of state is independent from its clock signal. Let’s see its diagram structure.
The JK flip flop diagram above represents the basic structure which consists of Clock (CLK), Clear (CLR), and Preset (PR).
Below is the circuit diagram of JK Flip Flop. Two 3-input NAND gates are used in place of the original two 2-input AND gates. The outputs at Q and Q’ are coupled to each gate’s third input. Since the two inputs are now interlocked, the SR flip-flop’s cross-coupling enables the previously invalid condition of (S = “1”, R = “1”) to be employed to perform the “toggle action”.
In a circuit “set”, the bottom NAND gate interrupts the J input coming from the “0” position of Q’. In the “RESET” state, the top NAND gate interrupts the K input coming from the 0 positions of Q. We can use Q and Q’ to control the input because they are always different. The flip flop is toggled according to the truth table when both inputs “J” and “K” are set to 1.
Truth Table
What is JK Flip-Flop ?
In Digital Electronics and communication science, flip-flops are widely used for handling binary information. These fundamental building blocks are used to store and manipulate information as per our needs. From the Flipflop family, Jack Kilby flip-flop(JK Flipflop) is very prominent as it is very versatile and can be used as a basic memory element. It can store binary information, and toggle functionality with a diversity of making applications with it. This article will cover all about JK flipflop.